906 Electronic and Electrical Engineering
Imperial College London
Hi, I’m currently an Imperial College London PhD student in the Circuits and Systems Group, under the supervision of Professor George Constantinides. I am also a member of the Intel Graphics Numerical Hardware Group My research looks at all aspects of numerical hardware design and how we can create fast but verified hardware. My main project looks at novel techniques to optimise RTL level circuit designs, with side projects investigating bitvector transformation correctness and tight arithmetic expression bounds.
|Nov 1, 2023
|We presented our paper Multiplier Optimization via E-Graph Rewriting as a poster at ASILOMAR 2023! A great session with lots of interest - enjoyed working with Andy Wanna, Theo Drane, Prof. Constantinides and Prof. Ercegovac on this project.
|Oct 27, 2023
|Went to Iowa to present our paper Datapath Verification via Word-Level E-Graph Rewriting at FMCAD 2023! A great conference with lots of interest in the work, many thanks to the organizers.
|Oct 1, 2023
|Our paper Multiplier Optimization via E-Graph Rewriting will be presented at ASILOMAR 2023! Looking forward to seeing everyone in a few weeks!
|Oct 1, 2023
|Our paper Datapath Verification via Word-Level E-Graph Rewriting will be presented at FMCAD 2023! Looking forward to seeing everyone in a few weeks!
|Apr 25, 2023
|Our paper Combining E-Graphs with Abstract Interpretation was accepted for publication at the SOAP Workshop co-located with PLDI 203!
|Feb 20, 2023
|Our paper Automating Constraint-Aware Datapath Optimization using E-Graphs was accepted for publication at DAC!
Automatic Datapath Optimization using E-GraphsProceedings - Symposium on Computer Arithmetic, 2022
Small Proofs from Congruence ClosureProceedings of the 22nd Conference on Formal Methods in Computer-Aided Design, FMCAD 2022, 2022
Automating Constraint-Aware Datapath Optimization using E-Graphs2023 60th ACM/IEEE Design Automation Conference (DAC), 2023