new students

It is obvious that AI is changing the way hardware is designed while also creating an insatiable demand for new chips. I believe this is the right moment to raise the abstraction level: use mathematics as the human-written specification, then let a combination of AI and new synthesis technologies determine the most efficient hardware. To make that hardware trustworthy, formal proofs should be a first-class requirement in our toolchains.

My approach is built on three pillars:

• Open-source EDA tools (e.g., CIRCT), as a platform for both research exploration and industrial hardware design.
• Equality saturation (and related methods) to massively expand the optimization search space.
• Collaborative formal methods, combining multiple solvers to provide industrial-strength guarantees about the hardware we build.

Applying to work with me

I am actively seeking PhD students. Applicants should follow the official Imperial EEE PhD application process to understand when and how to apply.

Before submitting an application, please read some of my work to check whether we have common interests. Then reach out with your CV and any research papers or projects you have worked on. Please title emails as “Prospective PhD Candidate”.

I appreciate personalized emails that demonstrate familiarity with my research. Generic or fully AI-generated emails make it difficult for me to assess mutual research interests.

What I look for

• Intellectual curiosity: do you enjoy reading broadly and asking questions outside your immediate area?
• Independence: while I will support you, PhD research requires self-driven work over long periods.
• Resilience: setbacks are part of research; the key is learning from feedback and coming back stronger.

Example PhD topics

• Verified logic synthesis: bugs in synthesis engines can be fatal. We cannot blindly trust optimizations in open-source hardware tools, so how do we prove them correct? Topics include rewriting DSLs, solver improvements, and orchestrating multiple provers.
• Flexible floating-point design: AI hardware increasingly mixes formats within one pipeline, but existing HDLs often express this as an explosion of muxes. Can we express multi-precision design more cleanly and generate optimized implementations automatically?

Expectations

What you can expect from me

• A relatively hands-on supervision style, though unlikely to involve writing thousands of lines of code.
• Weekly 30-minute meetings plus quarterly progress meetings with constructive feedback.
• Responses within two working days, usually faster.
• A publicly visible calendar showing when I am away.
• Opportunities for outreach, networking, and regular conference travel.
• Paper discussion sessions to build a clear narrative around where our work fits in the literature.
• Interest in your broader goals, whether academia, industry, entrepreneurship, or something else.

What I expect from you

• Clear and honest communication, especially when timelines or challenges change.
• Responsiveness during working hours, and accurate use of the shared calendar.
• Dedication and time management, especially when research stalls or priorities conflict.
• Punctuality, particularly for meetings with collaborators.
• Support for the group, including small administrative tasks and mentoring newer students.
• A commitment to open-source research tooling that can be demonstrated and used in practice.

What neither side should expect

• Routine replies outside normal working hours. If I message out of hours, you should feel free to respond in working hours.
• Immediate answers to every research problem. By definition, research explores the unknown.
• Complete coverage of all new literature. We must be selective and strategic in what we read.

Group culture

My primary goal is to build a research group where everyone feels included and can do their best work, regardless of background. If this culture does not align with how you work best, my group may not be the right fit.

The default working location is in person at Imperial, and most meetings are expected to be face to face. In my experience, this supports high-bandwidth communication and stronger collaboration. Occasional home working is absolutely fine when needed.

My research is often inspired by industrial challenges, and we work closely with industry. You should expect internship opportunities with chip design and EDA companies. I will help create opportunities through introductions at conferences and industry visits; making the most of them is then up to you.

AI tools are increasingly important in research. I encourage students to use them as tools, with careful scrutiny, and to be able to explain and defend all technical choices. Communication is a core research skill, so you should expect frequent opportunities to present internally and externally.

I prefer not to leave things to the last minute. Deliverables, including papers and reports, should ideally be ready several weeks before deadline. Academic writing is an iterative process requiring multiple rounds of refinement.

Throughout your PhD, I encourage normal working hours: arrive around 9-10am and leave around 6pm. This keeps overlap high across the group and supports healthy work-life balance. Research sometimes needs flexibility, but consistently long hours are neither necessary nor desirable.

If meetings are online, please keep cameras on. It is much easier to build an effective working relationship and identify problems early.

Our group is embedded in the wider Circuits and Systems community in Imperial EEE, with strong links to Computer Science. Collaboration within and across these groups is strongly encouraged.

This is a living document, and feedback from group members and prospective students is welcome.

I strongly believe academics have their greatest impact through their students. While we aim for world-leading research, I am most excited by what students go on to do in the future. If the vision on this page resonates with you, I would be delighted to hear from you.